/*
 * @Description  : THE alu (arithmetic and logic unit) of the cpu
 * @authorName   : GuoJi
 * @github       : https://github.com/guoji-kk
 * @gitee        : https://gitee.com/guoji13663585559
 * @email        : 13663585559@163.com
 * @version      : 1.0
 * @Date         : 2023-05-14 23:34:46
 * @LastEditTime : 2023-05-16 20:30:05
 */

module alu(busA,busB,ALUctr,zero,Alu_out,Addr);
	input [31:0]busA,busB;
	input [1:0]ALUctr;
  
  	output [31:0]zero,Addr;
  	output reg[31:0]Alu_out;
  
  	//set ADD,SUB,OR,AND
  	parameter ADD=2'b00;
  	parameter SUB=2'b01;
  	parameter OR =2'b10;
	parameter AND=2'b11;
  
  	//four conditions
  	always@(*)begin
    		case(ALUctr)
      		ADD:begin
        		Alu_out=busA+busB;
      		end
      		SUB:begin
        		Alu_out=busA-busB;
      		end
      		OR:begin
        		Alu_out=busA|busB;
      		end
		    AND:begin
			    Alu_out=busA&busB;
		    end
    		endcase
  	end
  
	assign zero=Alu_out;
  	assign Addr=Alu_out;

endmodule
